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Modeling and Analysis of Modular Multilevel Converter in DC Voltage Control Timescale

标题:Modeling and Analysis of Modular Multilevel Converter in DC Voltage Control Timescale

作者:Hu,Jiabing(1); Zhu,Jianhang(2); Wan,Min(3)

摘要:Fault ride-through (FRT) control and protection are of vital importance for a modular multilevel converterbased high-voltage direct current (MMC-HVDC) system when dc-side pole-to-pole (PTP) or pole-to-ground (PTG) fault occurs. In this paper, a FRT strategy by reversing dc voltage polarity is proposed for symmetrical bipolar full-bridge submodule-based MMC-HVDC system. It is suitable for both PTP and PTG faults. By adopting this method, the dc voltage stress in PTG fault scenario and dc current stress in PTP fault scenario are eliminated. Meanwhile, the capability of transmitting rated active power is maintained during faults, which can minimize the impact of dc-side faults on ac grid. In addition, based on a deduced dc-side equivalent circuit, the dc line current oscillation phenomenon during FRT transient process is analyzed. An active damping control method is presented to suppress the transient oscillation. Finally, validity of the proposed FRT strategy is veried by PSCAD/EMTDC simulations.

发表于:IEEE Transactions on Industrial Electronics

发表时间:2018



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